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Physical Design Engineering Architect
Cadence đşđ¸ San Jose, California, United States of America
Drive physical design solutions from synthesis through tape-out, including floorplanning, placement and routing, clock construction, and signoff closure. Improve tools, flows, and methodologies while optimizing power, performance, and area and collaborating with cross-functional and R&D teams.
Responsibilities
- Drive physical design solutions from synthesis through tape-out, including floorplanning, placement and routing, clock construction, and signoff closure. Improve tools, flows, and methodologies while optimizing power, performance, and area and collaborating with cross-functional and R&D teams.
Requirements
- Requires a BS and at least 15 years of experience, an MS and at least 10 years, or a PhD and at least 7 years; candidates should have successfully owned blocks or SoCs through tape-out and be comfortable with advanced technology nodes. Strong problem-solving, teamwork, and communication skills are required, while experience with a scripting language such as Perl, Python, Tcl, or Shell is preferred.
Key Skills
About Cadence
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadenceâs Intelligent System Design⢠strategy, are essential for the worldâs leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the worldâs top 100 best-managed companies. Cadence solutions offer limitless opportunitiesâlearn more at www.cadence.com.
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