ASIC and Logic Design Engineering Manager

Lead and mentor a team of FPGA engineers while managing multiple development projects from architecture and implementation through verification, lab validation, and production release. Provide hands-on technical leadership in RTL and FPGA design, coordinate cross-functional engineering work, and manage project schedules, resources, risks, and quality.

Responsibilities

• Lead and mentor a team of FPGA engineers while managing multiple development projects from architecture and implementation through verification, lab validation, and production release. Provide hands-on technical leadership in RTL and FPGA design, coordinate cross-functional engineering work, and manage project schedules, resources, risks, and quality.

Requirements

• Requires a bachelor's or master's degree in Electrical Engineering, at least 12 years of digital FPGA design and integration experience, and at least five years leading FPGA or ASIC projects through production release. Candidates need extensive RTL, simulation, timing analysis, FPGA interface, verification, and hardware integration experience, along with strong project leadership and communication skills.

Benefits

• Medical Insurance
• Dental Insurance
• Vision Insurance
• Flexible Spending Accounts
• Retirement Savings Plans
• Life Insurance
• Disability Insurance
• Paid Vacation
• Paid Holidays
• Tuition Assistance

Key Skills