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Physical Design Engineering Director
Astera Labs 🇨🇦 Toronto, Ontario, Canada
Lead a team of physical design engineers to drive the implementation of connectivity ASICs from RTL to GDSII. Collaborate with cross-functional teams to ensure design convergence and establish best practices for high-speed serial connectivity products.
Responsibilities
- Lead a team of physical design engineers to drive the implementation of connectivity ASICs from RTL to GDSII. Collaborate with cross-functional teams to ensure design convergence and establish best practices for high-speed serial connectivity products.
Requirements
- Requires a bachelor's degree in Electrical or Computer Engineering and over 15 years of experience in physical design implementation at advanced nodes. Candidates must possess strong leadership skills and hands-on expertise in industry-standard EDA tools and scripting languages.
Benefits
- Discretionary bonus
- Incentives
Key Skills
About Astera Labs
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink™ Fusion, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
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