Make sure your resume makes it through AI screening. Most resumes get filtered by AI before a human sees them.
Silicon Design Manager, RTL Machine Learning, Accelerator Design
Google đşđ¸ Sunnyvale, California, United States of America
Lead and mentor a team of RTL design engineers to develop compute core IP for AI/ML hardware acceleration. Collaborate with cross-functional teams to drive architectural feasibility, design planning, and performance optimizations.
Responsibilities
- Lead and mentor a team of RTL design engineers to develop compute core IP for AI/ML hardware acceleration. Collaborate with cross-functional teams to drive architectural feasibility, design planning, and performance optimizations.
Requirements
- Requires a bachelor's degree in a technical field and at least 10 years of experience in chip and ASIC digital design. Candidates must possess significant expertise in computer architecture, RTL, and at least 3 years of people management experience.
Benefits
- Bonus
- Equity
- Health Insurance
Key Skills
About Google
A problem isn't truly solved until it's solved for all. Googlers build products that help create opportunities for everyone, whether down the street or across the globe. Bring your insight, imagination and a healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone. Check out our career opportunities at goo.gle/3DLEokh
BEFORE YOU APPLY
Make sure your resume makes it through AI screening Most resumes get filtered by AI before a human sees them.
Drag your resume here
or click to upload
(PDF only, max 20MB)
Upload your resume
Never miss similar opportunities đ
Get notified when new design engineering jobs that match your preferences become available. Set up personalized job alerts to stay ahead of the competition.