Sr. Manager, Physical Design Engineering, Annapurna Labs

Build and lead a physical design team to deliver multi-billion-transistor ML accelerator SoCs for AWS cloud infrastructure. Manage the physical design strategy, roadmap, and tapeout execution while driving continuous PPA improvement and technology node adoption.

Responsibilities

• Build, hire, and develop a physical design team of 10‑15 engineers
• Own headcount planning, performance management, career growth, and organizational scaling
• Define physical design strategy and execution roadmap for Inferentia, Trainium, and future products
• Institutionalize continuous PPA improvement through benchmarking, regression tracking, and dashboards
• Provide hands‑on technical leadership on timing closure, PDN architecture, high‑speed I/O, and 2.5D/3D integration
• Lead technology node enablement for 2nm and beyond, including PDK evaluation and flow development
• Champion AI/ML‑augmented design automation and innovative RTL2GDS methodologies
• Own tapeout execution: readiness reviews, foundry submittal, mask data coordination, post‑silicon yield learning
• Drive cross‑functional alignment with RTL, DFT, STA, package, and validation teams
• Collaborate with foundry partners and EDA vendors on tool roadmap and co‑development

Requirements

• 5+ years people‑management experience leading physical design teams of 8+ engineers
• 10+ years hands‑on ASIC/SoC physical design across advanced nodes (7nm, 5nm, 3nm) with multiple tapeouts
• Deep expertise in RTL‑to‑GDSII flow: floorplanning, CTS, routing, timing closure, PDN design, IR‑drop, physical verification
• Mastery of Synopsys (Fusion Compiler/ICC2, PrimeTime, StarRC, RedHawk‑SC) and Cadence (Innovus, Tempus, Quantus, Voltus) tools
• Advanced STA knowledge (MMMC, POCV/AOCV, SSTA, PBA, IR‑aware timing)
• Power integrity expertise (static/dynamic IR‑drop, EM, rush current)
• High‑speed PD experience (multi‑GHz datapaths, SerDes, DDR5, HBM, PCIe Gen5+)
• Scripting proficiency in TCL, Python, Perl
• Experience with 2.5D/3D integration (CoWoS, EMIB, InFO, Foveros) and chiplet strategies
• Track record of AI/ML‑augmented design automation (RL‑placement, ML‑guided ECO, predictive analytics)
• Strong program execution and cross‑functional alignment skills

Benefits

• Health insurance (medical, dental, vision, prescription)
• Basic Life & AD&D insurance with supplemental options
• Employee Assistance Program and mental health support
• Flexible Spending Accounts
• Adoption and surrogacy reimbursement
• 401(k) matching
• Paid time off and parental leave
• Sign‑on payments and restricted stock units (RSUs)
• Comprehensive employee discount programs

Key Skills