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Senior Manager, ASIC Design Engineering
Cornelis Networks Remote (đşđ¸ United States of America)
The Senior Manager will lead and grow the RTL design engineering team while overseeing full-lifecycle development of high-performance networking ASICs. They are responsible for building RTL implementation schedules, managing cross-functional execution, and driving organizational strategy and headcount planning.
Responsibilities
- The Senior Manager will lead and grow the RTL design engineering team while overseeing full-lifecycle development of high-performance networking ASICs. They are responsible for building RTL implementation schedules, managing cross-functional execution, and driving organizational strategy and headcount planning.
Requirements
- Candidates must have 15+ years of experience in the semiconductor industry with at least 5 years in people management and a degree in a relevant technical field. Strong expertise in microarchitecture, RTL coding, and SoC flows is required, along with the ability to lead large engineering organizations in a remote environment.
Benefits
- Medical coverage
- Dental coverage
- Vision coverage
- Disability insurance
- Life insurance
- Dependent care flexible spending account
- Accidental injury insurance
- Pet insurance
- Paid holidays
- 401(k) with company match
- Open Time Off
- Sick time
- Bonding leave
- Pregnancy disability leave
- Equity
- Performance-based incentives
Key Skills
About Cornelis Networks
The World's First Lossless and Congestion-Free Scale-Out Network Cornelis is solving one of the worldâs biggest compute efficiency challengesâunlocking application performance with network-led acceleration at any scale. From faster AI training and ultra-responsive inference to the most predictable, high-throughput HPC simulations, Cornelis delivers results where legacy networks fall short. Built on the proven Omni-Path architecture, our solutions provide maximum performance, efficiency, scalability, resiliency, and interoperabilityâempowering the next generation of AI and HPC infrastructure.
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