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Group Director, Design Engineering - Front End
Cadence Design Systems 🇺🇸 Austin, Texas, United States of America
Lead and mentor a team of RTL design engineers to develop microarchitectural features for IPs and subsystems. Oversee the full design cycle from RTL development and optimization to pre-silicon verification and signoff.
Responsibilities
- Lead and mentor a team of RTL design engineers to develop microarchitectural features for IPs and subsystems. Oversee the full design cycle from RTL development and optimization to pre-silicon verification and signoff.
Requirements
- Requires over 10 years of experience in front-end design or verification with a degree in Engineering or Computer Science. Candidates must have a proven track record in IP/SoC integration and expertise in RTL design and synthesis tools.
Key Skills
About Cadence Design Systems
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.
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