Senior Staff Engineer Design Engineering

Provide technical leadership and strategy for IP and full-chip verification of Automotive Ethernet products. Develop verification infrastructures, execute multi-level verification strategies, and lead root-cause analysis for complex simulation failures.

Responsibilities

• Provide technical leadership and mentorship to junior team members
• Take full ownership of IP verification and full chip verification
• Set verification direction: Define and execute end-to-end verification strategies, test plans, and define closure criteria
• Partner closely with system architects, RTL design, FGPA, emulation, and firmware teams to translate design intent into measurable verification goals
• Build verification infrastructure bridging digital RTL modules with analog/mixed-signal models
• Apply advanced verification techniques such as formal verification

Requirements

• Bachelor’s degree or above in Electronic, Electrical Engineering or Computer Science
• Minimum 8 years of working experiences in Design Verification
• Expert-level knowledge of Universal Verification Methodology (UVM)
• Mastery of SystemVerilog, Verilog, C/C++
• Hands-on experiences with Ethernet Protocol such as ethernet switch, PHY, MAC
• Experiences in coaching and training junior or mid-level verification engineers in testbench design and debug best practices

Benefits

• Opportunity to work with a team of expert verification engineers
• Chance to impact the development of game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT
• Collaborative and dynamic work environment
• Professional development opportunities
• Competitive salary and benefits package

Key Skills