Senior Principal Engineer, Digital Design Engineering

The Senior Principal Engineer will architect digital data paths for high-speed, mixed-signal CMOS ICs and lead the design of broadband communication subsystems. They will also develop high-speed converter calibration algorithms and collaborate with cross-functional teams to integrate complex design solutions.

Responsibilities

• Architect signal processing solutions for broadband communication systems
• Understand multi-customer system level requirements and synthesize differentiated digital system architecture
• Develop and implement high-speed converter calibration algorithms
• Perform broadband signal processing and system impairment correction algorithms
• Collaborate with cross-functional teams to integrate design solutions
• Lead the design and integration of broadband communications subsystems

Requirements

• Bachelor's degree in Electrical Engineering (BSEE); Master's degree (MSEE) or PhD preferred
• 15+ years of experience in high-speed digital IC design or architecture
• Proven digital design experience with products containing SERDES, RF CMOS and high-speed data converters
• Design expertise in FinFET or fine-line planar analog CMOS process technologies and tradeoffs
• Experience in software-defined CMOS communications or radar system design
• Proficiency in digitally-assisted high-speed analog design

Benefits

• Medical, vision and dental coverage
• 401k
• Paid vacation, holidays, and sick time
• Discretionary performance-based bonus

Key Skills