Design jobs at Teradyne
Explore current design job openings and career opportunities at Teradyne
ASIC and Logic Design Engineering Intern, Summer 2026, (Teradyne, Agoura Hills, CA)
🇺🇸 Agoura Hills, CA 91301, United States of America
Teradyne 🇺🇸 Agoura Hills, CA 91301, United States of America
The intern will assist in the design, optimization, and characterization of high-speed or high-power ICs for ATE instruments using Cadence EDA tools. Responsibilities include physical layout implementation, documentation, and performing IC evaluations in the lab.
ASIC and Logic Design Engineering Manager (Teradyne, North Reading)
🇺🇸 North Reading, MA 01864, United States of America
Teradyne 🇺🇸 North Reading, MA 01864, United States of America
The Logic Design Manager will lead a team of 4-6 engineers in designing and verifying FPGAs for next-generation products, requiring close collaboration with other engineering disciplines. This involves leading multiple simultaneous development projects, managing schedules, budgets, staffing, and contributing to RTL code implementation when necessary.